Summary
Overview
Work History
Education
Skills
CAREER HIGHLIGHTS
IMMIGRATION / WORK STATUS
Timeline
Generic
Venkatesh Marabathina

Venkatesh Marabathina

Sydney

Summary

A proactive Silicon Validation and Debug Engineer specializing in Hardware Validation. I am looking for a challenging role to apply my skills in complex fault isolation and debug, contributing to the establishment of robust validation methodologies and best practices. I am passionate about continuous learning and thrive within a creative, collaborative team setting.

Overview

11
11
years of professional experience

Work History

Senior Software Engineer

Wipro Technologies - Client: Intel
08.2021 - Current
  • Led and coordinated cross-functional teams for validation and debug projects across geographies.
  • Acted as the primary liaison between internal engineering teams and external customers.
  • Facilitated technical discussions and resolved integration issues impacting customer releases.
  • Delivered technical advisories, test plans, and debug reports for Power Management Domain.
  • Utilized tools like WinDBG, PVT, Socwatch and Putty for in-depth system validation.
  • Contributed to successful and timely product launches by supporting critical program milestones.

Senior Validation Engineer

UST GLOBAL - Client: Intel
01.2017 - 08.2021
  • Managed end-to-end debugging lifecycle for Power Management, Stress and Stability activities.
  • Collaborated with global stakeholders to resolve customer-facing issues.
  • Ensured timely defect closure, tracking, and root cause identification to support smooth releases.
  • Maintained project dashboards and generated detailed test status and quality reports.

Test Engineer

Eureka IT Solutions – Client: Mphasis
11.2014 - 01.2017
  • Reviewed functional requirement specifications to ensure comprehensive test coverage.
  • Executed test cases and managed defect lifecycle (identification, logging, tracking, verification).
  • Configured test beds and executed test cases across various testing phases (e.g., unit, integration, system).
  • Flashed and certified the latest firmware for ROM and Controller on HP ProLiant servers.
  • Ensured product quality completeness by verifying release checklists and documenting known issues for user manuals/release notes prior to release sign-off.

Education

Bachelor of Engineering - Computer Science

JNTU Anantapur University
06-2013

Skills

  • JIRA
  • Confluence
  • MS Project
  • USB/PD Protocol Analyzers
  • WinDBG
  • Oscilloscope
  • JTAG
  • ETLs
  • ITP
  • LauterBach

CAREER HIGHLIGHTS

  • Overall 10+ years of professional experience in engineering, validation, and stakeholder-facing project management roles within the semiconductor industry.
  • Successfully led cross-functional teams to deliver complex product validation cycles and releases within the Power Management domain.
  • Managed critical internal and customer-facing initiatives, ensuring seamless communication and alignment from concept to product deployment.
  • Spearheaded hardware/software/firmware debug and issue resolution, significantly reducing time-to-market and improving product stability.
  • Developed and executed comprehensive test plans, streamlining validation processes and enhancing coverage for complex silicon designs.
  • Implemented effective risk mitigation strategies and conducted in-depth root cause analysis to proactively addressed critical product issues.
  • Mentored junior engineers and provided performance reporting, fostering continuous skill development and team excellence.

IMMIGRATION / WORK STATUS

TSS 482 Dependent visa

Timeline

Senior Software Engineer

Wipro Technologies - Client: Intel
08.2021 - Current

Senior Validation Engineer

UST GLOBAL - Client: Intel
01.2017 - 08.2021

Test Engineer

Eureka IT Solutions – Client: Mphasis
11.2014 - 01.2017

Bachelor of Engineering - Computer Science

JNTU Anantapur University
Venkatesh Marabathina