Summary
Overview
Work History
Education
Skills
Accomplishments
Timeline
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YIMING ZENG

Sydney,NSW

Summary

Recent graduate with a Master's degree in Telecommunications from UNSW, and a Bachelor's degree in Electronic Information Engineering from Soochow University. Possess hands-on experience in CAD layout and data analysis through internships at Jingfang Semiconductor and Qichacha Technology. Skilled in AutoCAD, Python, and MATLAB, with a strong foundation in embedded systems testing and validation. Eager to contribute to the development and quality assurance of embedded systems in a dynamic engineering environment.

Overview

3
3
years of professional experience

Work History

Testing Engineer Intern

ByteDance
Shanghai, China
06.2024 - 10.2024
  • Developed automated test scripts for Android-based applications using Python and Appium, reducing manual test time by over 50%.
  • Executed functional, regression, and performance testing across multiple devices and environments, identifying and reporting more than 30 critical bugs.
  • Collaborated with developers and product managers to refine test plans and verify bug fixes, accelerating release cycles.
  • Maintained detailed test documentation and reports, ensuring traceability and compliance with QA standards.

Data Analysis Assistant Engineer (Intern)

Qichacha Technology Co., Ltd
Suzhou, China
06.2023 - 10.2023
  • Processed and cleaned over 10,000 enterprise records using Python and Excel, improving data reliability for downstream analysis.
  • Built automated Excel dashboards to track business indicators, reducing weekly reporting time by approximately 40%.
  • Analyzed company profiles and market metrics to support risk assessment and commercial intelligence reports.
  • Tested internal data integration tools, and collaborated with backend developers to identify and resolve over 10 data flow issues.

CAD Intern

Jingfang Semiconductor Co., Ltd
Suzhou, China
01.2022 - 04.2022
  • Designed and updated over 30 IC layout schematics using AutoCAD and internal EDA tools, accelerating project turnaround by 15%.
  • Optimized PCB trace routing workflows by reorganizing library structures, reducing manual rework by 20%.
  • Generated and maintained detailed design documentation and version control logs for cross-functional teams, improving traceability.
  • Validated layout drawings against DFM standards through close collaboration with product and fabrication engineers, ensuring 100% first-pass compliance.

Education

Master of Science - Master of Engineering Science (Telecommunications)

University of New South Wales (UNSW)
Sydney, Australia
05-2026

Bachelor of Science - Bachelor of Engineering (Electronic Information En

Soochow University
Suzhou, China
06-2024

Skills

  • CAD tools: AutoCAD, OrCAD, Altium Designer
  • EDA software: Cadence, Synopsys
  • Programming languages: Python, MATLAB, SQL
  • Data analysis tools: Excel, Power BI, Tableau
  • Version control: Git
  • Document preparation: LaTeX
  • Microsoft Office proficiency

Accomplishments

  • Academic Excellence Award (top 20%), Soochow University, 2023
  • Excellent Intern Award – Jingfang Semiconductor Internship Program, 2022

Timeline

Testing Engineer Intern

ByteDance
06.2024 - 10.2024

Data Analysis Assistant Engineer (Intern)

Qichacha Technology Co., Ltd
06.2023 - 10.2023

CAD Intern

Jingfang Semiconductor Co., Ltd
01.2022 - 04.2022

Master of Science - Master of Engineering Science (Telecommunications)

University of New South Wales (UNSW)

Bachelor of Science - Bachelor of Engineering (Electronic Information En

Soochow University

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